Regviz

Microchip Technology /ATSAML11E15A /PAC /SECLOCKC

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as SECLOCKC

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Microchip Technology/ATSAML11E14A/PAC/SECLOCKC#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (EVSYS_)EVSYS_ 0 (SERCOM0_)SERCOM0_ 0 (SERCOM1_)SERCOM1_ 0 (SERCOM2_)SERCOM2_ 0 (TC0_)TC0_ 0 (TC1_)TC1_ 0 (TC2_)TC2_ 0 (ADC_)ADC_ 0 (DAC_)DAC_ 0 (PTC_)PTC_ 0 (TRNG_)TRNG_ 0 (CCL_)CCL_ 0 (OPAMP_)OPAMP_ 0 (TRAM_)TRAM_

Description

Peripheral secure status locked - Bridge C

Fields

EVSYS_

EVSYS Secure Status Locked
SERCOM0_

SERCOM0 Secure Status Locked
SERCOM1_

SERCOM1 Secure Status Locked
SERCOM2_

SERCOM2 Secure Status Locked
TC0_

TC0 Secure Status Locked
TC1_

TC1 Secure Status Locked
TC2_

TC2 Secure Status Locked
ADC_

ADC Secure Status Locked
DAC_

DAC Secure Status Locked
PTC_

PTC Secure Status Locked
TRNG_

TRNG Secure Status Locked
CCL_

CCL Secure Status Locked
OPAMP_

OPAMP Secure Status Locked
TRAM_

TRAM Secure Status Locked

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data